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Rev PrD, 28-May-09 Preliminary Product InformationAll Information Subject to Change
ACT361
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High Performance ActivePSRTM Primary Switching Regulator FEATURES
* Patented Primary Side Regulation
Technology The ACT361 ensures safe operation with complete protection against all fault conditions. Built-in protection circuitry is provided for output shortcircuit, output over-voltage, line under-voltage, and over temperature conditions. The ACT361 ActivePSRTM is optimized for high performance, cost-sensitive applications, and utilizes Active-Semi's proprietary primary-side feedback architecture to provide accurate constant voltage, constant current (CV/CC) regulation without the need of an opto-coupler or reference device. Integrated line and primary inductance compensation circuitry provides accurate constant current operation despite wide variations in line voltage and primary inductance. Integrated output cord resistance compensation further enhances output accuracy. The ACT361 achieves excellent regulation and transient response, yet requires less than 150mW of standby power. The ACT361 is optimized for 2W to 7W applications. It is available in space-saving 6 pin SOT23-6 package. Figure 1: Simplified Application Circuit
* No Opto-Coupler * Best-in-Class Constant Voltage, Constant
Current Accuracy
* * * *
Low EMI Proprietary Fast Startup Circuit Built-in Soft-Start Circuit Integrated Line and Primary Inductance Compensation Resistance Compensation
* Integrated Programmable Output Cord * Line Under-Voltage, Output Over-Voltage,
Output Short-Circuit and Over-Temperature Protection
* Complies with all Global Energy Efficiency
and CEC Average Efficiency Standards
* Adjustable power from 2W to 7W * Minimum External Components * Tiny SOT23-6 Package
APPLICATIONS
* Chargers for Cell Phones, PDAs, MP3,
Portable Media Players, DSCs, and Other Portable Devices and Appliances
* RCC Adapter Replacements * Linear Adapter Replacements * Standby and Auxiliary Supplies
VDD BD
ACT361
SW CS G FB
GENERAL DESCRIPTION
The ACT361 belongs to the high performance patented ActivePSRTM Family of Universal-input AC/DC off-line controllers for battery charger and adapter applications. It is designed for flyback topology working in discontinuous conduction mode (DCM). The ACT361 meets all of the global energy efficiency regulations (CEC, European Blue Angel, and US Energy Star standards) while using very few external components.
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Rev PrD, 28-May-09
ACT361
TOP MARK
DZLW
ORDERING INFORMATION
PART NUMBER
ACT361US-T
TEMPERATURE RANGE
-40C to 85C
PACKAGE
SOT23-6
PINS
6
PACKING METHOD
TAPE & REEL
PIN CONFIGURATION
SW
1
6
CS
DZLW
G
2
5
FB
BD
3
4
VDD
SOT23-6 ACT361US-T
PIN DESCRIPTIONS
PIN
1 2 3 4 5 6
NAME
SW G BD VDD FB CS
DESCRIPTION
Switch Drive. Switch node for the external NPN transistor. Connect this pin to the external power NPN's emitter. This pin also supplies current to VDD during startup. Ground. Base Drive. Base driver for the external NPN transistor. Power Supply. This pin provides bias power for the IC during startup and steady state operation. Feedback Pin. Connect this pin to a resistor divider network from the auxiliary winding. Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak current limit for the primary switch. The peak current limit is set by (0.4V x 0.9) / RCS. For more detailed information, see Application Information.
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Rev PrD, 28-May-09
ACT361
UNIT
V mA V A W C/W C C C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
VDD, BD, SW to G Maximum Continuous VDD Current FB, CS to G Continuous SW Current Maximum Power Dissipation (derate 4.5mW/C above TA = 50C) Junction to Ambient Thermal Resistance (JA) Operating Junction Temperature Storage Junction Lead Temperature (Soldering, 10 sec)
VALUE
-0.3 to +30 100 -0.3 to +6 Internally limited 0.45 220 -40 to 150 -55 to 150 300
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 14V, VOUT = 5V, LP = 2.7mH, NP = 168, NS = 12, NA = 30, TA = 25C, unless otherwise specified.)
PARAMETER
Supply VDD Turn-On Voltage VDD Turn-Off Voltage Supply Current Start Up Supply Current BD Current during Startup Internal Soft Startup Time Oscillator Switching Frequency Clamp Switching Frequency Minimum Switching Frequency Maximum Duty Cycle
SYMBOL
VDDON VDDOFF IDD IDDST IBDST
TEST CONDITIONS
VDD Rising from 0 VDD Falling after Turn-on VDD = 14V, after Turn-on VDD = 14V, before Turn-on
MIN
17.5 5.25
TYP
18.5 5.5 1 25 10
MAX
20 5.75 2 45 2
UNIT
V V mA A A ms
fSW fCLAMP fMIN DMAX
100% VOUTCV @ full load 25% VOUTCV @ full load 45 TBD 70
42 21 55 1.5 75 TBD 80
kHz kHz kHz %
Feedback
Effective FB Voltage FB Leakage Current No RCORD between VDD and SW RCORD = 330k Output Cable Resistance Compensation DVCOMP RCORD = 160k RCORD = 82k RCORD = 39k
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VFB
2.188
2.210 0 3 6 9 12
2.232 100
V nA
%
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Rev PrD, 28-May-09
ACT361
ELECTRICAL CHARACTERISTICS CONT'D
(VDD = 14V, VOUT = 5V, LP = 2.7mH, NP = 168, NS = 12, NA = 30, TA = 25C, unless otherwise specified.)
PARAMETER
Current Limit SW Current Limit Range CS Current Limit Threshold Leading Edge Blanking Time Driver Outputs Switch ON-Resistance SW Off Leakage Current Protection VDD Latch-Off Voltage Thermal Shutdown Temperature Thermal Hysteresis Line UVLO
SYMBOL
TEST CONDITIONS
MIN
100
TYP
MAX
600
UNIT
mA mV ns
VCSLIM
388 200
400 300
412
RON
ISW = 50mA VSW = 22V VDDON +2
1.2 0 VDDON +3 150 20
2 1 VDDON +4
A
VDDOVP
V C C mA
IFBUVLO
RFB1 = 53.6k
0.15
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Rev PrD, 28-May-09
ACT361
FUNCTIONAL BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
As shown in the Functional Block Diagram, to regulate the output voltage in CV (constant voltage) mode, the ACT361 compares the feedback voltage at FB pin to the internal reference and generates an error signal to the pre-amplifier. The error signal, after filtering out the switching transients and compensated with the internal compensation network, modulates the external NPN transistor peak current at CS pin with current mode PFWM (Pulse Frequency and Width Modulation) control. To regulate the output current in CC (constant current) mode, the oscillator frequency is modulated by the output voltage. SW is a driver output that drives the emitter of an external high voltage NPN transistor. This baseemitter-drive method makes the drive circuit the most efficient. ACT361 internal circuitry and the NPN base drive until the output voltage is high enough to sustain VDD through the auxiliary winding. The VDDOFF threshold is 5.5V; therefore, the voltage on the VDD capacitor must remain above 5.5V while the output is charging up.
Constant Voltage (CV) Mode Operation
In constant voltage operation, the ACT361 captures the auxiliary flyback signal at FB pin through a resistor divider network R8 and R9 in Figure 2. The signal at FB pin is pre-amplified against the internal reference voltage, and the secondary side output voltage is extracted based on Active-Semi's proprietary filter architecture. This error signal is then amplified by the internal error amplifier. When the secondary output voltage is above regulation, the error amplifier output voltage decreases to reduce the switch current. When the secondary output voltage is below regulation, the error amplifier output voltage increases to ramp up the switch current to bring the secondary output back to regulation. The output regulation voltage is determined by the following relationship:
R VOUTCV = 2 .21V x 1 + FB1 R FB 2 NS x N - VD A
Fast Startup
VDD is the power supply terminal for the ACT361. During startup, the ACT361 typically draws only 20A supply current. The startup resistor from the rectified high voltage DC rail supplies current to the base of the NPN transistor. This results in an amplified emitter current to VDD through the SW pin via Active-Semi's proprietary fast-startup circuitry until it exceeds the VDDON threshold 19V. At this point, the ACT361 enters internal startup mode with the peak current limit ramping up in 10ms. After switching starts, the output voltage begins to rise. The VDD bypass capacitor must supply the
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(1)
where RFB1 (R8) and RFB2 (R9) are top and bottom feedback resistor, NS and NA are numbers of
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Rev PrD, 28-May-09
ACT361

FUNCTIONAL DESCRIPTION CONT'D
transformer secondary and auxiliary turns, and VD is the rectifier diode forward drop voltage at approximately 0.1A bias. Standby (No Load) Mode In no load standby mode, the ACT361 oscillator frequency is further reduced to a minimum frequency while the current pulse is reduced to a minimum level to minimize standby power. The actual minimum switching frequency is programmable with an output preload resistor. Loop Compensation The ACT361 integrates loop compensation circuitry for simplified application design, optimized transient response, and minimal external components. Output Cable Resistance Compensation The ACT361 provides programmable output cable resistance compensation during constant voltage regulation, monotonically adding an output voltage correction up to predetermined percentage at full power. There are four levels to program the output cable compensation by connecting a resistor (R4 in Figure 2) from the SW pin to VDD pin. The percentage at full power is programmable to be 3%, 6%, 9% or 12%, and by using a resistor value of 330k, 160k, 82k or 39k respectively. If there is no resistor connection, there is no cord compensation. This feature allows for better output voltage accuracy by compensating for the output voltage droop due to the output cable resistance.
IOUTCC = 0.4V x 0.9 x fSW 1 x x LP x R V 2 CS OUTCV
2
(2)
The constant current operation typically extends down to lower than 40% of nominal output voltage regulation. Primary Inductance Compensation The ACT361 integrates a built-in proprietary (patent-pending) primary inductance compensation circuit to maintain constant current regulation despite variations in transformer manufacturing. The compensated range is 7%. Primary Inductor Current Limit Compensation The ACT361 integrates a primary inductor peak current limit compensation circuit to achieve constant input power over line and load ranges.
Protection
The ACT361 incorporates multiple protection functions including over-voltage, over-current and over-temperature. Output Short Circuit Protection When the secondary side output is short circuited, the ACT361 enters hiccup mode operation. In this condition, the VDD voltage drops below the VDDOFF threshold and the auxiliary supply voltage collapses. This turns off the ACT361 and causes it to restart. This hiccup behavior continues until the short circuit is removed. Output Over Voltage Protection The ACT361 includes output over-voltage protection circuitry, which shuts down the IC when the output voltage is 40% above the normal regulation voltage for 4 consecutive switching cycles. The ACT361 enters hiccup mode when an output over voltage fault is detected. Over Temperature Shutdown The thermal shutdown circuitry detects the ACT361 die temperature. The typical over temperature threshold is 150C with 20C hysteresis. When the die temperature rises above this threshold the ACT361 is disabled and remains disabled until the die temperature falls by 20C, at which point the ACT361 is re-enabled.
Constant Current (CC) Mode Operation
When the secondary output current reaches a level set by the internal current limiting circuit, the ACT361 enters current limit condition and causes the secondary output voltage to drop. As the output voltage decreases, so does the flyback voltage in a proportional manner. An internal current shaping circuitry adjusts the switching frequency based on the flyback voltage so that the transferred power remains proportional to the output voltage, resulting in a constant secondary side output current profile. The energy transferred to the output during each switching cycle is 1/2(LP x ILIM2) x , where LP is the transformer primary inductance, ILIM is the primary peak current, and is the conversion efficiency. From this formula, the constant output current can be derived: where fSW is the switching frequency and VOUTCV is the nominal secondary output voltage.
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Rev PrD, 28-May-09
ACT361
TYPICAL APPLICATION
Design Example
The design example below gives the procedure for a DCM flyback converter using the ACT361. Refer to Application Circuit in Figure 2, the design for a charger application starts with the following specification:
Input Voltage Range Output Power Output Voltage OCP Current 85VAC - 265VAC, 50/60Hz 3.5W 5.0V 0.78A
When the transistor is turned off, the voltage on the transistor's collector consists of the input voltage and the reflected voltage from the transformer's secondary winding. There is a ringing on the rising top edge of the flyback voltage due to the leakage inductance of the transformer. This ringing is clamped by a RCD network if it is used. Design this clamped voltage as 50V below the breakdown of the NPN transistor. The flyback voltage has to be considered with selection of the maximum reverse voltage rating of secondary rectifier diode. If a 40V Schottky diode is used, then the flyback voltage can be calculated:
VRO = VINDCMAX x (VOUTCV + VD ) 375 x ( 5 + 0.37 ) = = 74.6V (5) VDREV - VOUTCV 40 x 0.8 - 5
The operation for the circuit shown in Figure 2 is as follows: the rectifier bridge D1-D4 and the capacitor C1/C2 convert the AC line voltage to DC. This voltage supplies the primary winding of the transformer T1 and the startup resistor R1/R2. The primary power current path is formed by the transformer's primary winding, the NPN transistor, the ACT361 internal MOSFET and the current sense resistor R7. The resistor R6 and capacitor C4 create a snubber clamping network that protects Q1 from voltage spikes due to the transformer primary winding leakage inductance. The network consisting of capacitor C3 and diode D5 provides a VDD supply voltage for ACT361 from the auxiliary winding of the transformer. C3 is the decoupling capacitor of the supply voltage and energy storage component for startup. The diode D7 and the capacitor C7 rectifies and filters the output voltage. The resistor divider consisting of R8 and R9 programs the output voltage. The minimum and maximum DC input voltages can be calculated:
2POUT (
2 VINDCMIN = 2VACMIN -
where VD is the Schottky diode forward voltage, VDREV is the maximum reverse voltage rating of the diode and VOUTCV is the output voltage. The maximum duty cycle is set to be 40% at low line voltage 85VAC and the circuit efficiency is estimated to be 72%. Then the maximum average input current is:
IIN = VOUTCV x IOUTCC 5 x 0.78 = = 60 mA VINDCMIN x 90 x 72 %
(6)
The maximum input primary peak current:
I PK = 2 x I IN 2 x 60 = = 300 mA DMAX 40 %
(7)
The primary inductance of the transformer:
LP = VINDCMAX x DMAX 90 x 40% = = 2.8 mH I PK x fSW 300 mA x 42 kHz
(8)
The primary to secondary turns ratio NP/NS:
VRO NP 75 = = = 14 NS VOUTCV + VD 5 + 0.37
(9)
The auxiliary to secondary turns ratio NA/NS:
NA VDD + VD 14 + 0.37 = = = 2.53 NS VOUTCV + VD + VCODE 5 + 0.37 + 0.3
1 - tC ) 2fL x CIN
(10)
= 2 x 85 2 -
2 x 3.5(
1 - 3.5 ms ) 2 x 50 90V 75% x 2 x 4.7 F
(3) (4)
An EE16 transformer gapped core with an effective inductance ALE of 100nH/T2 is selected. The number of turns of the primary winding is:
NP = LP 2.8 mH = = 168 ALE 100 nH / T 2
VINDCMAX = 2 x VACMAX = 2 x 265 = 375V
(11)
where is the estimated circuit efficiency, fL is the line frequency, tC is the estimated rectifier conduction time, CIN is empirically selected to be 2 x 4.7F electrolytic capacitors based on the 3F/W rule of thumb.
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The number of turns of secondary and auxiliary windings can be derived accordingly:
NS = NS 1 x NP = x 168 = 12 NP 14
(12)
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Rev PrD, 28-May-09
ACT361
TYPICAL APPLICATION CONT'D
NA = NA x N S = 2 .53 x 12 = 30 NS
(13)
The current sense resistance (R7) determines the current limit value based on the following equation:
RCS = VCSLIM x 0.9 0.4V x 0.9 = = 1 .2 I PK 300 mA
(14)
The voltage feedback resistors are selected according to the design. The upper feedback resistor is a fixed value determined by the ACT361 design as 53.6k. The lower feedback resistor is selected as:
RFB2 = VFB (VOUTCV + VD ) NA - VFB NS RFB1
=
2.21 x 53.6 = 10.5 k ( 5 + 0.37 ) x 2.53 - 2.21
(15)
When selecting the output capacitor, a low ESR electrolytic capacitor is recommended to minimize ripple from the current ripple. The approximate equation for the output capacitance value is given by:
COUT = IOUTCC 0.7 = = 310 F FSW xVRIPPLE 45 kHz x 50mV
(16)
A 470F electrolytic capacitors are used to keep the ripple small.
PCB Layout Guideline
Good PCB layout is critical to have optimal performance. Decoupling capacitor (C3), current sense resistor (R7) and feedback resistor (R8/R9) should be placed close to VDD, CS and FB pins respectively. There are two main power path loops. One is formed by C1/C2, primary winding, NPN transistor and the ACT361. The other is the secondary winding, rectifier D7 and output capacitors (C7/C8). Keep these loop areas as small as possible. Connect high current ground returns, the input capacitor ground lead, and the ACT361 G pin to a single point (star ground configuration).
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Rev PrD, 28-May-09 Figure 2: Universal VAC Input, 5V/0.7A Output Charger
L FR1 L1 T1 R1 D4 D1 R2 D3 N R4 D2 + C1 + C2 R10 D5 Q1 GND R8 D7 R11 C7 + VO
ACT361
BD R5 VDD
SW FB
ACT361
G CS R7
C3
R9
Table 1: ACT361 Bill of Materials ITEM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
REFERENCE
U1 C1, C2 C3 C7 D1-D4 D5 D7 L1 Q1 RF1 R1, R2 R4 R5 R7 R8 R9 R10 R11 T1
DESCRIPTION
IC, ACT361US-T, SOT23-6 Capacitor, Electrolytic, 4.7F/400V, 8 x 12mm Capacitor, Ceramic, 2.2F/35V, 1206, SMD Capacitor, Electrolytic, 470F/10V, 8 x 12mm Diode, Rectifier, 1000V/1A, 1N4007, DO-41 Diode, Ultra Fast, FR102,100V/1.0A, DO-41 Diode, Schottky, 40V/2A, SB240, DO-15 Axial Inductor, 1.5mH, 0410, Dip Transistor, NPN, 700V,1.5A, KSB13003AR, TO-92 Fusible Resistor, 1W, 10, 5% Chip Resistor, 10M, 1206, 5% Chip Resistor, 162k, 0805, 5% Chip Resistor, 22, 0603, 5% Chip Resistor, 1.18, 1206, 5% Chip Resistor, 53.6k, 0805, 1% Chip Resistor, 143k, 10.5k, 1% Chip Resistor, 10, 0805, 5% Chip Resistor, 1.1k, 0805, 5% Transformer, LP = 2.8mH7%, EE16
QTY
1 2 1 1 4 1 1 1 1 1 2 1 1 1 1 1 1 1 1
MANUFACTURER
Active-Semi KSC POE KSC Good-Ark Good-Ark Good-Ark Amode Tech Semi How TY-OHM TY-OHM TY-OHM TY-OHM TY-OHM TY-OHM TY-OHM TY-OHM TY-OHM
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Rev PrD, 28-May-09
ACT361
PACKAGE OUTLINE
SOT23-6 PACKAGE OUTLINE AND DIMENSIONS
D b L
0.2
SYMBOL
A
DIMENSION IN MILLIMETERS MIN
1.050 0.000 1.050 0.300 0.100 2.820 1.500 2.650
DIMENSION IN INCHES MIN
0.041 0.000 0.041 0.012 0.004 0.111 0.059 0.104
MAX
1.250 0.100 1.150 0.500 0.200 3.020 1.700 2.950
MAX
0.049 0.004 0.045 0.020 0.008 0.119 0.067 0.116
E1
A1 A2 b
c
e e1
E
c D E
A1
E1 e e1 L L1
A2
A
0.950 TYP 1.800 2.000
0.037 TYP 0.071 0.079
0.700 REF 0.300 0 0.600 8
0.028 REF 0.012 0 0.024 8
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact sales@active-semi.com or visit http://www.active-semi.com. For other inquiries, please send to: 2728 Orchard Parkway, San Jose, CA 95134-2012, USA
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